JPH0412199U - - Google Patents
Info
- Publication number
- JPH0412199U JPH0412199U JP1990049042U JP4904290U JPH0412199U JP H0412199 U JPH0412199 U JP H0412199U JP 1990049042 U JP1990049042 U JP 1990049042U JP 4904290 U JP4904290 U JP 4904290U JP H0412199 U JPH0412199 U JP H0412199U
- Authority
- JP
- Japan
- Prior art keywords
- memory cell
- logic input
- circuit
- signal
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990049042U JPH0412199U (en]) | 1990-05-10 | 1990-05-10 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990049042U JPH0412199U (en]) | 1990-05-10 | 1990-05-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0412199U true JPH0412199U (en]) | 1992-01-31 |
Family
ID=31566393
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990049042U Pending JPH0412199U (en]) | 1990-05-10 | 1990-05-10 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0412199U (en]) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6253020A (ja) * | 1985-09-02 | 1987-03-07 | Nec Corp | 集積回路 |
JPH0297121A (ja) * | 1988-10-03 | 1990-04-09 | Seiko Epson Corp | 半導体集積回路装置 |
-
1990
- 1990-05-10 JP JP1990049042U patent/JPH0412199U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6253020A (ja) * | 1985-09-02 | 1987-03-07 | Nec Corp | 集積回路 |
JPH0297121A (ja) * | 1988-10-03 | 1990-04-09 | Seiko Epson Corp | 半導体集積回路装置 |
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